The present invention is directed to a system for testing computer boards, in particular, testing of fibre channel circuitry.
Fibre channel is implemented on a loop and signals are sent on the loop from an initiator node to a target node. The signals move along the loop from one node to the next. Typically, an error in a signal that reaches a target will be noted, if at all, by the target. Identification of where along the loop an error was caused requires special techniques. Stability of fibre channel operation has been improved by the implementation of digital fibre distribution hubs. In particular, the LH5000 Series Digital Fibre Hub manufactured and sold by Emulex Corporation of Costa Mesa, Calif. has the ability to maintain loop integrity by providing automatic bypass of unused and/or non-powered ports. The Emulex hubs eliminate signal jitter, provide automatic clock speed matching on all ports and isolate faulty nodes. An Emulex hub can switch a bypass which isolates faulty nodes and allows the loop to operate normally while cabling or other faults are diagnosed and corrected. The elimination of signal jitter and clock speed and the provision of clock speed matching provides flexibility in network design and cabling distances for fibre channel loops. The Emulex hubs permit system administrators to monitor loop status and look at the number of invalid transmission words, comparative error rates and port down counts.
Manufacturers of computer boards for fibre channel operation including processor boards or host bus adapter boards, benefit from testing their hardware circuitry before shipping it to customers. Components such as fibre channel controllers, serializer/deserializers and drive components have traditionally been tested in an initiator or target. Either one device under test would operate in a loop-back mode or a device under test would communicate with a known good device. In either configuration, the device under test would have to be programmed to perform this diagnostic routine. Access to the appropriate programming interface is often difficult and dictates the overall architecture of the diagnostics. Additionally, the loop-back operation mode lacks an objective source for reporting errors, since the device under test is queried for its own status.
Embodiments of the present invention are directed to a test system and method for testing devices, such as fibre channel processor boards or host bus adaptors. In accordance with an embodiment of the test system, a test path is formed through at least one distribution hub. Each hub has ports for making connection to ports on devices under test. The ports on the devices can be switched in and out of the test path by controlling switches in the hub. A host computer runs a diagnostic program that sets switches in the distribution hubs and devices under test and causes a test signal to be sent along the test path. By variously adjusting the switches, numerous path configurations may be cycled through to test the various circuitry within the devices under test. In accordance with an embodiment of the invention, the distribution hubs advantageously have the ability to detect, report and eliminate errors in the signals passing there through so that a faulty component can be accurately located and testing can continue along the system. Distribution hubs can be connected in series so that mass testing can take place on numerous devices. This feature is especially advantageous to high volume manufacturing and quality control.
According to a further embodiment of the system and method of the invention, the host computer communicates with the distribution hubs and devices under test through a command path separate from the test path. The command path of the system is provided through a multi-terminal connector, more specifically referred to herein as a terminal concentrator.
In a still further embodiment, a test signal generator is used to send the test signal on the test path. The host communicates with the test signal generator through the multi-terminal connector. The system is particularly advantageous for use with fibre channel testing. As such, the test signal generator would generate a fibre channel protocol signal. According to a further embodiment of the system and method, the test signal is a fibre channel protocol signal not addressed to any device under test. Rather the signal is a loopback signal for returning along the test path back to the test signal generator. For testing dual-ported fibre channel boards, the system includes two test signal generators, one for each of two test loops.
Other objects and advantages of the invention will become apparent during the following description of the presently preferred embodiments of the invention taken in conjunction with the drawings.